/*
 * @Authoryour name
 * @Date2020-12-08 23:10:55
 * @LastEditTime2020-12-09 23:29:23
 * @LastEditorsyour name
 * @DescriptionIn User Settings Edit
 * @FilePath\STM32H750_FreeRTOS\Bsp\bsp_qspi\bsp_qspi_w25q64.h
 */ 
#ifndef BSP_QSPI_W25Q64_H_
#define BSP_QSPI_W25Q64_H_

#include "common_types.h"
#include "stm32h7xx_hal.h"

#define QSPI_GPIO_CLK_EN()              \
    do{                                 \
        __HAL_RCC_GPIOF_CLK_ENABLE();   \
        __HAL_RCC_GPIOG_CLK_ENABLE();   \
    }while(0)
    

#define QSPI_GPIO_CS_PIN                          GPIO_PIN_6
#define QSPI_GPIO_CS_PORT                         GPIOG

#define QSPI_GPIO_CLK_PIN                         GPIO_PIN_10
#define QSPI_GPIO_IO0_PIN                         GPIO_PIN_8
#define QSPI_GPIO_IO1_PIN                         GPIO_PIN_9
#define QSPI_GPIO_IO2_PIN                         GPIO_PIN_7
#define QSPI_GPIO_IO3_PIN                         GPIO_PIN_6
#define QSPI_GPIO_PORT                            GPIOF     

#define QPSI_CLK_EN()                             __HAL_RCC_QSPI_CLK_ENABLE()
#define QSPI_FALSH                                QUADSPI
#define QSPI_FLASH_SIZE                           23
#define QSPI_SECTOR_SIZE                          (4*1024)
#define QSPI_PAGE_SIZE                            256
#define QSPI_END_ADDR                             (1 << QSPI_FLASH_SIZE)
#define QSPI_FLASH_SIZE_BYTE                      (8 * 1024 * 1024)

#define W25Q64_FLASH_SIZE                         23
#define W25Q64_SECTOR_BIT_NUM                     12                   
#define W25Q64_SECTOR_SIZE                        (4*1024)
#define W25Q64_PAGE_SIZE                          256
#define W25Q64_END_ADDR                           (1 << QSPI_FLASH_SIZE)
#define W25Q64_FLASH_SIZE_BYTE                    (8 * 1024 * 1024)

#define W25Q64_CMD_PAGE_PROGRAM                   0x02
#define W25Q64_CMD_WRITE_DISABLE                  0x04
#define W25Q64_CMD_WRITE_ENABLE                   0x06
#define W25Q54_CMD_ENABLE_RESET                   0x66
#define W25Q54_CMD_RESET                          0x99
#define W25Q64_CMD_READ_ID                        0x9F
#define W25Q64_CMD_READ_STATUS_REG                0x05
#define W25Q64_CMD_CHIP_ERASE                     0xC7
#define W25Q64_CMD_SECTOR_ERASE                   0x20
#define W25Q64_CMD_SUBSECTOR_ERASE_4_ADDR         0x21
#define W25Q64_CMD_FAST_PROG_4_ADDR               0x34
#define W25Q64_CMD_FAST_READ_QPI_QUAD             0xEB
#define W25Q64_CMD_FAST_READ_QUAD_IO_4_ADDR       0xEC
#define W25Q64_CMD_FAST_READ_QPI_IO4              0x0B
#define W25Q64_CMD_EXIT_QPI_MODE                  0xFF
#define W25Q64_CMD_ENTER_QPI_MODE                 0x38

#define W25QXX_MODE_SPI                           0
#define W25QXX_MODE_QPI                           1

#define W25QXX_QE_MASK                            0x02
#define W25QXX_BUSY_MASK                          0x01

#define W25QXX_SetReadParameters                  0xC0
#define W25QXX_ReadStatusReg1                     0x05
#define W25QXX_ReadStatusReg2                     0x35
#define W25QXX_ReadStatusReg3                     0x15
#define W25QXX_WriteStatusReg1                    0x01 // Reg1 Reg2
#define W25QXX_WriteStatusReg2                    0x01 //0x31
#define W25QXX_WriteStatusReg3                    0x01 //0x11

extern void bsp_w25q64_test(void);

extern void bsp_w25q64_init(void);
extern void bsp_w25q64_read(uint8_t *buffer, uint32_t read_addr, uint32_t read_size);
extern void bsp_w25q64_write(uint8_t *buffer, uint32_t write_addr, uint32_t write_size);
extern void bsp_w25q64_direct_write(uint8_t *buffer, uint32_t write_addr, uint32_t write_size);
extern void bsp_w25q64_erase_sector(uint32_t addr);
extern void bsp_w25q64_erase_chip(void);
extern void bsp_w25q64_memorymapped(void);

#endif /* BSP_QSPI_W25Q64_H_ */
